Target: Analog Devices ADSP-21020

The Analog Devices ADSP-21020 32/48-bit floating-point Digital Signal Processor (DSP) is a fore-runner of the current SHARC family of DSPs from Analog Devices. The ADSP-21020, or rather its space-qualified implementation in the TEMIC TSC-21020 device, was the original target processor of the Bound-T time and stack analyser which was developed by Space Systems Finland Ltd (SSF) under contract to the European Space Agency (ESA).

The ADSP-210202 as such is obsolete and replaced by newer SHARC and Blackfin devices. Bound-T has not been updated to support the newer devices, partly because many of them contain caches and other dynamic accelerators that are difficult to model for WCET analysis. Stack analysis would of course be easier, and Tidorum would certainly consider an update of Bound-T for stack usage analysis of SHARC or Blackfin code, if a customer requires it.

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The ADSP-21020 processor

The ADSP-21020 is a Digital Signal Processor for 32-bit integer and floating-point computations. Instructions are 48 bits wide and there is some support for 48-bit data, too. The processors has separate program and data memories (Harvard architecture) and can perform computations in parallel with memory accesses.

There are several parallel functional units and instructions can activate parallel computations. For example, a single one-cycle instruction can compute both the sum and the difference of two integer operands; or both the product of two floating-point operands and the sum of two other floating-point operands.

The program memory can also be used for data operands, which doubles the data-access bandwidth. A small instruction cache reduces contention on the program bus between data accesses and instruction fetches.

The computational pipeline is three levels deep. Branch instructions normally perform a delayed branch and unconditionally execute the two following instructions after the branch instruction, before the branch takes effect.

The ADSP-21020 has dedicated instructions and program-sequencing logic to support zero-overhead loops. The processor has dedicated loop-counter registers and performs loop-iteration counting and loop-termination checks in the background, in parallel with the real computational instructions in the loop. Such loops can be nested six deep and have interesting interactions with branch delays and branches that explicitly exit (break) loops. Properly modelling the control-flow of an ADSP-21020 program, starting from the machine code, was quite challenging.

Supported ADSP-21020 features

Bound-T for the ADSP-21020 models the full instruction set. However, the computational model focuses on instructions that may be significant for loop counters and control flow. Thus, the focus is on 32-bit integer computations. The more exotic instructions and operations are modelled approximately as giving unknown (opaque) results; this includes the saturating mode of integer computation and all floating-point computation.

For execution-time analysis Bound-T models the pipeline effects but assumes that all instruction fetches are satisfied from the program memory; the instruction cache is not modelled. While the instruction cache is important only for those instructions that access data operands via the program memory bus, for such instructions the cache can double execution speed (from 2 cycles per instruction to one cycle), and Bound-T then over-estimates the execution time by the same factor.

The ADSP-21020 can use fast or slow memories, and different memory banks in the same system can have different access times. The number of wait states is programmed in ADSP-21020 control registers, or can be determined by handshake lines. Bound-T does not model the details of memory accesses. Instead, the user writes command-line options or assertions to set the number of wait-states that Bound-T will asume for reads and writes to external memory.

The ADSP-21020 has a small, internal, hardware stack, the PC stack, that stores return addresses for the CALL instruction and loop-head addresses for the zero-overhead loops created by the DO UNTIL instruction. The PC stack has room for only 20 addresses, which severely limits the nesting of calls and loops. Therefore, the compilers for the ADSP-21020 normally use a stack implemented by software in the main data memory. This stack is called the CCP stack since its structure and usage are part of the C Calling Protocol defined for the ADSP-21020.

For stack-usage analysis Bound-T models only the CCP stack, not the PC stack.

Supported ADSP-21020 cross-compilers

Bound-T for the ADSP-21020 has been tested and used only with the Analog Devices GNU GCC-based compiler, g21k. At present Bound-T can read ADSP-21020 executable programs only in COFF format.

Tidorum will be happy to check Bound-T/21020 against your chosen compiler, assuming the compiler is available for download (perhaps in limited "demo" form) or that you can provide Tidorum with some test programs in executable form.


Document (PDF) Description
ADSP-21020 Application Note Describes the capabilities of Bound-T for the ADSP-21020 and how to use it. See also the general Bound-T manuals.


Here is a small ADSP-21020 program with some examples of its WCET and stack-usage analysis with Bound-T.

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