The SPARC V7 processor, in its space-qualified implementation as the "ERC32", was an early target for the Bound-T execution-time and stack-usage analyser. This page shows:
The SPARC V7 and V8 are 32-bit RISC processors with a single pipeline but a separate and concurrent Integer Unit and Floating Point Unit. Bound-T/SPARC has been targeted specifically to the ERC32 implementation by ATMEL, a radiation-tolerant SPARC V7 chip with built-in error controls. Bound-T/SPARC does not support the newer LEON processors which, although descendants of the ERC32, have much more complex and dynamic architectures that usually include caches, asynchronous buses, and other elements with complicated timing.
For timing analysis Bound-T/SPARC models the SPARC V7 instruction set as implemented in the ERC32. For stack-usage analysis Bound-T/SPARC can also model the SPARC V8E instruction set, which is a small extension to SPARC V7 and is implemented in some LEON processors. However, as already noted above, LEON timing analysis is not provided.
For timing analysis Bound-T/SPARC supports only the ERC32 device. For stack usage analysis any SPARC V7/V8/V8E devices can be used.
Bound-T/SPARC has been tested and used with GCC-based compilers, both for C and for Ada, and with the Aonix Ada compiler for the ERC32. Tidorum will be happy to check Bound-T/SPARC against your chosen compiler, assuming the compiler is available for download (perhaps in limited "demo" form) or that you can provide Tidorum with some test programs in executable form.
|SPARC/ERC32 V7, V8, V8E Application Note||Describes the capabilities of Bound-T for the SPARC/ERC32 and how to use it. See also the general Bound-T manuals.|
Here is a small ERC32 program with some examples of its WCET and stack-usage analysis with Bound-T.