*2nd International Workshop on Worst-Case Execution Time Analysis (WCET'2002),
Technical University of Vienna, Austria, June 18, 2002*
## Status of the Bound-T tool

Niklas Holsti and Sami Saarinen
### Abstract

Bound-T is a tool for static WCET analysis from binary executable code.
We describe the general structure of the tool and some specific
difficulties met in the analysis of the supported processors,
which are the Intel 8051 8-bit microcontrollers, the Analog
Devices ADSP-21020 Digital Signal Processor, and the SPARC V7 processor.
For the DSP, the problem is the complex program sequencing logic
using an instruction pipe-line and nested zero-overhead loops with
implicit counters and branches. The solution is to model the full
sequencing state in the control-flow graph. For the SPARC, the
problems are the register-file overflow and underflow traps,
which may occur at calls and returns, and the concurrency of
integer and floating-point operations, which may force the
Integer Unit to wait when it interacts with the Floating-Point Unit.
The traps are modelled with a whole-program analysis.
The IU/FPU concurrency is modelled by distributing the
potential waiting times onto flow-graph edges in a heuristically
optimal way, also using some inter-procedural analysis.
paper (pdf),
presentation (pdf)